Advanced Hardware And Pcb Design Masterclass 20... Hot! Jun 2026
: Selecting a processor based on core count, cache, and bandwidth. You will deep-dive into the RK3399 datasheet and memory organization. Memory Design (SDRAM)
: Practical techniques for minimizing noise from switching power supplies and high-frequency digital signals. Recommended Industry Tools
A mix of capacitor values handles different frequency ranges. Place small, low-ESR ceramic capacitors (0201 or 01005 sizes) as close as possible to the IC power pins to suppress high-frequency noise. Use larger bulk capacitors further away for low-frequency energy storage. Advanced Hardware and PCB Design Masterclass 20...
When routing across multiple inner layers, route adjacent signal layers orthogonally (one horizontally, the next vertically) to minimize the parallel overlap area. Power Delivery Network (PDN) Optimization
: Identifying and selecting internal and external SDRAM (up to DDR5/LPDDR5 ), pin mapping, and creating schematics from scratch. Power Management (PMIC) : Detailed selection and schematic design of Power Management ICs and external LDO/DC-DC converters. Storage & Connectivity : Integration of : Selecting a processor based on core count,
D. Glossary of Terms
To prevent signal reflections, the characteristic impedance ( Z0cap Z sub 0 Recommended Industry Tools A mix of capacitor values
What are you designing for (e.g., PCIe Gen 5, DDR5, RF)?
High-frequency return currents follow the path of least inductance, directly underneath the signal trace on the reference plane. Routing a high-speed trace over a split, gap, or void in the ground plane forces the return current to take a long detour. This creates a loop antenna that radiates EMI and destroys signal quality.
Every signal current must return to its source. The path of least impedance for high-speed signals is the path of least inductance —which sits directly underneath the trace on the reference plane.
The course is typically structured into three main phases: Component Architecture, Advanced Layout, and Manufacturing Compliance. 1. High-Speed Architecture & Signal Integrity Processor & Memory Selection